veripower
chipweaver/veripower · chipweaver
An open-source agent flow from natural language spec through Verilog RTL and UVM verification to front-end signoff on commercial EDA tools
项目资料
基本信息
- Star
- 6
- 派生
- 1
- 语言
- Python
- 许可证
- MIT
- 创建时间
- 2026-06-11
- 最近更新
- 2026-09-20
同一分类
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